71 lines
3.2 KiB
C++
71 lines
3.2 KiB
C++
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#pragma once
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#include <sys/prctl.h>
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#include <x86intrin.h>
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namespace utils {
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// TSC stands for Time-Stamp Counter
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#ifndef __x86_64__
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#error The TSC library only supports x86_64
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#endif
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/// This function reads the CPUs internal Time-Stamp Counter. This counter is
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/// used to get a precise timestamp. It differs from the usual POSIX
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/// `clock_gettime` in that (without additional computing) it can be only used
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/// for relative time measurements. The Linux kernel uses the TSC internally to
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/// implement `clock_gettime` when the clock source is set to TSC.
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///
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/// The TSC is implemented as a register in the CPU that increments its value
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/// with a constant rate. The behavior of the TSC initially was to increment the
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/// counter on each instruction. This was then changed to the current behavior
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/// (>= Pentium 4) that increments the TSC with a constant rate so that CPU
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/// frequency scaling doesn't affect the measurements.
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///
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/// The TSC is guaranteed that it won't overflow in 10 years and because it is
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/// mostly implemented as a 64bit register it doesn't overflow even in 190 years
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/// (see Intel manual).
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///
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/// One issue of the TSC is that it is unique for each logical CPU. That means
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/// that if a context switch happens between two `ReadTSC` calls it could mean
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/// that the counters could have a very large offset. Thankfully, the counters
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/// are reset to 0 at each CPU reset and the Linux kernel synchronizes all of
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/// the counters. The synchronization can be seen here (`tsc_verify_tsc_adjust`
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/// and `tsc_store_and_check_tsc_adjust`):
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/// https://github.com/torvalds/linux/blob/master/arch/x86/kernel/tsc_sync.c
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/// https://github.com/torvalds/linux/blob/master/arch/x86/kernel/tsc.c
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/// https://github.com/torvalds/linux/blob/master/arch/x86/include/asm/tsc.h
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///
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/// All claims here were taken from sections 17.17 and 2.8.6 of the Intel 64 and
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/// IA-32 Architectures Software Developer's Manual.
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///
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/// Here we use the RDTSCP instruction instead of the RDTSC instruction because
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/// the RDTSCP instruction forces serialization of code execution in the CPU.
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/// Intel recommends the usage of the RDTSCP instruction for precision timing:
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/// https://www.intel.com/content/dam/www/public/us/en/documents/white-papers/ia-32-ia-64-benchmark-code-execution-paper.pdf
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///
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/// Inline assembly MUST NOT be used because the compiler won't be aware that
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/// certain registers are being overwritten by the RDTSCP instruction. That is
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/// why we use the builtin command.
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/// https://stackoverflow.com/questions/13772567/get-cpu-cycle-count/51907627#51907627
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///
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/// Comparison of hardware time sources can be seen here:
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/// https://access.redhat.com/documentation/en-US/Red_Hat_Enterprise_MRG/2/html/Realtime_Reference_Guide/chap-Timestamping.html#example-Hardware_Clock_Cost_Comparison
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inline unsigned long long ReadTSC() {
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unsigned int cpuid;
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return __rdtscp(&cpuid);
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}
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/// The TSC can be disabled using a flag in the CPU. This function checks for
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/// the availability of the TSC. If you call `ReadTSC` when the TSC isn't
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/// available it will cause a segmentation fault.
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/// https://blog.cr0.org/2009/05/time-stamp-counter-disabling-oddities.html
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inline bool CheckAvailableTSC() {
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int ret;
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if (prctl(PR_GET_TSC, &ret) != 0) return false;
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return ret == PR_TSC_ENABLE;
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}
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} // namespace utils
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