mirror of
https://github.com/mirror/tinycc.git
synced 2024-12-26 03:50:07 +08:00
335 lines
7.0 KiB
C
335 lines
7.0 KiB
C
/* ------------------------------------------------------------------ */
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/* WARNING: relative order of tokens is important. */
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/* register */
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DEF_ASM(r0)
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DEF_ASM(r1)
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DEF_ASM(r2)
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DEF_ASM(r3)
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DEF_ASM(r4)
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DEF_ASM(r5)
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DEF_ASM(r6)
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DEF_ASM(r7)
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DEF_ASM(r8)
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DEF_ASM(r9)
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DEF_ASM(r10)
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DEF_ASM(r11) /* fp */
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DEF_ASM(r12) /* ip[c] */
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DEF_ASM(r13) /* sp */
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DEF_ASM(r14) /* lr */
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DEF_ASM(r15) /* pc */
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/* register macros */
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DEF_ASM(fp) /* alias for r11 */
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DEF_ASM(ip) /* alias for r12 */
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DEF_ASM(sp) /* alias for r13 */
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DEF_ASM(lr) /* alias for r14 */
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DEF_ASM(pc) /* alias for r15 */
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/* coprocessors */
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DEF_ASM(p0)
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DEF_ASM(p1)
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DEF_ASM(p2)
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DEF_ASM(p3)
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DEF_ASM(p4)
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DEF_ASM(p5)
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DEF_ASM(p6)
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DEF_ASM(p7)
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DEF_ASM(p8)
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DEF_ASM(p9)
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DEF_ASM(p10)
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DEF_ASM(p11)
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DEF_ASM(p12)
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DEF_ASM(p13)
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DEF_ASM(p14)
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DEF_ASM(p15)
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/* coprocessor registers */
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DEF_ASM(c0)
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DEF_ASM(c1)
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DEF_ASM(c2)
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DEF_ASM(c3)
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DEF_ASM(c4)
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DEF_ASM(c5)
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DEF_ASM(c6)
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DEF_ASM(c7)
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DEF_ASM(c8)
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DEF_ASM(c9)
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DEF_ASM(c10)
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DEF_ASM(c11)
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DEF_ASM(c12)
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DEF_ASM(c13)
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DEF_ASM(c14)
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DEF_ASM(c15)
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/* single-precision VFP registers */
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DEF_ASM(s0)
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DEF_ASM(s1)
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DEF_ASM(s2)
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DEF_ASM(s3)
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DEF_ASM(s4)
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DEF_ASM(s5)
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DEF_ASM(s6)
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DEF_ASM(s7)
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DEF_ASM(s8)
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DEF_ASM(s9)
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DEF_ASM(s10)
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DEF_ASM(s11)
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DEF_ASM(s12)
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DEF_ASM(s13)
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DEF_ASM(s14)
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DEF_ASM(s15)
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DEF_ASM(s16)
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DEF_ASM(s17)
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DEF_ASM(s18)
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DEF_ASM(s19)
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DEF_ASM(s20)
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DEF_ASM(s21)
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DEF_ASM(s22)
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DEF_ASM(s23)
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DEF_ASM(s24)
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DEF_ASM(s25)
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DEF_ASM(s26)
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DEF_ASM(s27)
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DEF_ASM(s28)
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DEF_ASM(s29)
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DEF_ASM(s30)
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DEF_ASM(s31)
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/* double-precision VFP registers */
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DEF_ASM(d0)
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DEF_ASM(d1)
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DEF_ASM(d2)
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DEF_ASM(d3)
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DEF_ASM(d4)
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DEF_ASM(d5)
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DEF_ASM(d6)
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DEF_ASM(d7)
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DEF_ASM(d8)
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DEF_ASM(d9)
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DEF_ASM(d10)
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DEF_ASM(d11)
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DEF_ASM(d12)
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DEF_ASM(d13)
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DEF_ASM(d14)
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DEF_ASM(d15)
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/* data processing directives */
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DEF_ASM(asl)
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/* instructions that have no condition code */
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DEF_ASM(cdp2)
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DEF_ASM(ldc2)
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DEF_ASM(ldc2l)
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DEF_ASM(stc2)
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DEF_ASM(stc2l)
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#define ARM_INSTRUCTION_GROUP(tok) ((((tok) - TOK_ASM_nopeq) & 0xFFFFFFF0) + TOK_ASM_nopeq)
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/* Note: condition code is 4 bits */
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#define DEF_ASM_CONDED(x) \
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DEF(TOK_ASM_ ## x ## eq, #x "eq") \
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DEF(TOK_ASM_ ## x ## ne, #x "ne") \
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DEF(TOK_ASM_ ## x ## cs, #x "cs") \
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DEF(TOK_ASM_ ## x ## cc, #x "cc") \
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DEF(TOK_ASM_ ## x ## mi, #x "mi") \
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DEF(TOK_ASM_ ## x ## pl, #x "pl") \
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DEF(TOK_ASM_ ## x ## vs, #x "vs") \
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DEF(TOK_ASM_ ## x ## vc, #x "vc") \
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DEF(TOK_ASM_ ## x ## hi, #x "hi") \
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DEF(TOK_ASM_ ## x ## ls, #x "ls") \
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DEF(TOK_ASM_ ## x ## ge, #x "ge") \
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DEF(TOK_ASM_ ## x ## lt, #x "lt") \
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DEF(TOK_ASM_ ## x ## gt, #x "gt") \
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DEF(TOK_ASM_ ## x ## le, #x "le") \
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DEF(TOK_ASM_ ## x, #x) \
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DEF(TOK_ASM_ ## x ## rsvd, #x "rsvd")
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/* Note: condition code is 4 bits */
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#define DEF_ASM_CONDED_WITH_SUFFIX(x, y) \
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DEF(TOK_ASM_ ## x ## eq ## _ ## y, #x "eq." #y) \
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DEF(TOK_ASM_ ## x ## ne ## _ ## y, #x "ne." #y) \
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DEF(TOK_ASM_ ## x ## cs ## _ ## y, #x "cs." #y) \
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DEF(TOK_ASM_ ## x ## cc ## _ ## y, #x "cc." #y) \
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DEF(TOK_ASM_ ## x ## mi ## _ ## y, #x "mi." #y) \
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DEF(TOK_ASM_ ## x ## pl ## _ ## y, #x "pl." #y) \
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DEF(TOK_ASM_ ## x ## vs ## _ ## y, #x "vs." #y) \
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DEF(TOK_ASM_ ## x ## vc ## _ ## y, #x "vc." #y) \
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DEF(TOK_ASM_ ## x ## hi ## _ ## y, #x "hi." #y) \
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DEF(TOK_ASM_ ## x ## ls ## _ ## y, #x "ls." #y) \
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DEF(TOK_ASM_ ## x ## ge ## _ ## y, #x "ge." #y) \
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DEF(TOK_ASM_ ## x ## lt ## _ ## y, #x "lt." #y) \
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DEF(TOK_ASM_ ## x ## gt ## _ ## y, #x "gt." #y) \
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DEF(TOK_ASM_ ## x ## le ## _ ## y, #x "le." #y) \
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DEF(TOK_ASM_ ## x ## _ ## y, #x "." #y) \
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DEF(TOK_ASM_ ## x ## rsvd ## _ ## y, #x "rsvd." #y)
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#define DEF_ASM_CONDED_VFP_F32_F64(x) \
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DEF_ASM_CONDED_WITH_SUFFIX(x, f32) \
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DEF_ASM_CONDED_WITH_SUFFIX(x, f64)
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/* Note: add new tokens after nop (MUST always use DEF_ASM_CONDED) */
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DEF_ASM_CONDED(nop)
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DEF_ASM_CONDED(wfe)
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DEF_ASM_CONDED(wfi)
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DEF_ASM_CONDED(swi)
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DEF_ASM_CONDED(svc)
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/* misc */
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DEF_ASM_CONDED(clz)
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/* size conversion */
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DEF_ASM_CONDED(sxtb)
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DEF_ASM_CONDED(sxth)
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DEF_ASM_CONDED(uxtb)
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DEF_ASM_CONDED(uxth)
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DEF_ASM_CONDED(movt)
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DEF_ASM_CONDED(movw)
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/* multiplication */
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DEF_ASM_CONDED(mul)
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DEF_ASM_CONDED(muls)
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DEF_ASM_CONDED(mla)
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DEF_ASM_CONDED(mlas)
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DEF_ASM_CONDED(smull)
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DEF_ASM_CONDED(smulls)
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DEF_ASM_CONDED(umull)
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DEF_ASM_CONDED(umulls)
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DEF_ASM_CONDED(smlal)
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DEF_ASM_CONDED(smlals)
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DEF_ASM_CONDED(umlal)
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DEF_ASM_CONDED(umlals)
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/* load/store */
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DEF_ASM_CONDED(ldr)
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DEF_ASM_CONDED(ldrb)
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DEF_ASM_CONDED(str)
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DEF_ASM_CONDED(strb)
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DEF_ASM_CONDED(ldrex)
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DEF_ASM_CONDED(ldrexb)
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DEF_ASM_CONDED(strex)
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DEF_ASM_CONDED(strexb)
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DEF_ASM_CONDED(ldrh)
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DEF_ASM_CONDED(ldrsh)
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DEF_ASM_CONDED(ldrsb)
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DEF_ASM_CONDED(strh)
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DEF_ASM_CONDED(stmda)
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DEF_ASM_CONDED(ldmda)
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DEF_ASM_CONDED(stm)
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DEF_ASM_CONDED(ldm)
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DEF_ASM_CONDED(stmia)
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DEF_ASM_CONDED(ldmia)
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DEF_ASM_CONDED(stmdb)
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DEF_ASM_CONDED(ldmdb)
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DEF_ASM_CONDED(stmib)
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DEF_ASM_CONDED(ldmib)
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DEF_ASM_CONDED(ldc)
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DEF_ASM_CONDED(ldcl)
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DEF_ASM_CONDED(stc)
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DEF_ASM_CONDED(stcl)
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/* instruction macros */
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DEF_ASM_CONDED(push)
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DEF_ASM_CONDED(pop)
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/* branches */
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DEF_ASM_CONDED(b)
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DEF_ASM_CONDED(bl)
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DEF_ASM_CONDED(bx)
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DEF_ASM_CONDED(blx)
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/* data processing instructions; order is important */
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DEF_ASM_CONDED(and)
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DEF_ASM_CONDED(ands)
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DEF_ASM_CONDED(eor)
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DEF_ASM_CONDED(eors)
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DEF_ASM_CONDED(sub)
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DEF_ASM_CONDED(subs)
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DEF_ASM_CONDED(rsb)
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DEF_ASM_CONDED(rsbs)
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DEF_ASM_CONDED(add)
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DEF_ASM_CONDED(adds)
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DEF_ASM_CONDED(adc)
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DEF_ASM_CONDED(adcs)
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DEF_ASM_CONDED(sbc)
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DEF_ASM_CONDED(sbcs)
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DEF_ASM_CONDED(rsc)
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DEF_ASM_CONDED(rscs)
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DEF_ASM_CONDED(tst)
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DEF_ASM_CONDED(tsts) // necessary here--but not useful to the user
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DEF_ASM_CONDED(teq)
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DEF_ASM_CONDED(teqs) // necessary here--but not useful to the user
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DEF_ASM_CONDED(cmp)
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DEF_ASM_CONDED(cmps) // necessary here--but not useful to the user
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DEF_ASM_CONDED(cmn)
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DEF_ASM_CONDED(cmns) // necessary here--but not useful to the user
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DEF_ASM_CONDED(orr)
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DEF_ASM_CONDED(orrs)
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DEF_ASM_CONDED(mov)
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DEF_ASM_CONDED(movs)
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DEF_ASM_CONDED(bic)
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DEF_ASM_CONDED(bics)
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DEF_ASM_CONDED(mvn)
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DEF_ASM_CONDED(mvns)
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DEF_ASM_CONDED(lsl)
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DEF_ASM_CONDED(lsls)
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DEF_ASM_CONDED(lsr)
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DEF_ASM_CONDED(lsrs)
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DEF_ASM_CONDED(asr)
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DEF_ASM_CONDED(asrs)
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DEF_ASM_CONDED(ror)
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DEF_ASM_CONDED(rors)
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DEF_ASM_CONDED(rrx)
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DEF_ASM_CONDED(rrxs)
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DEF_ASM_CONDED(cdp)
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DEF_ASM_CONDED(mcr)
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DEF_ASM_CONDED(mrc)
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// Floating point high-level instructions
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DEF_ASM_CONDED(vldr)
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DEF_ASM_CONDED(vstr)
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DEF_ASM_CONDED_VFP_F32_F64(vmla)
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DEF_ASM_CONDED_VFP_F32_F64(vmls)
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DEF_ASM_CONDED_VFP_F32_F64(vnmls)
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DEF_ASM_CONDED_VFP_F32_F64(vnmla)
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DEF_ASM_CONDED_VFP_F32_F64(vmul)
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DEF_ASM_CONDED_VFP_F32_F64(vnmul)
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DEF_ASM_CONDED_VFP_F32_F64(vadd)
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DEF_ASM_CONDED_VFP_F32_F64(vsub)
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DEF_ASM_CONDED_VFP_F32_F64(vdiv)
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DEF_ASM_CONDED_VFP_F32_F64(vneg)
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DEF_ASM_CONDED_VFP_F32_F64(vabs)
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DEF_ASM_CONDED_VFP_F32_F64(vsqrt)
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DEF_ASM_CONDED_VFP_F32_F64(vcmp)
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DEF_ASM_CONDED_VFP_F32_F64(vcmpe)
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DEF_ASM_CONDED(vpush)
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DEF_ASM_CONDED(vpop)
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DEF_ASM_CONDED(vldm)
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DEF_ASM_CONDED(vldmia)
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DEF_ASM_CONDED(vldmdb)
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DEF_ASM_CONDED(vstm)
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DEF_ASM_CONDED(vstmia)
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DEF_ASM_CONDED(vstmdb)
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