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https://github.com/mirror/tinycc.git
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151 lines
3.2 KiB
C
151 lines
3.2 KiB
C
/*************************************************************/
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/*
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* RISCV64 assembler for TCC
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*
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*/
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#ifdef TARGET_DEFS_ONLY
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#define CONFIG_TCC_ASM
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#define NB_ASM_REGS 32
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ST_FUNC void g(int c);
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ST_FUNC void gen_le16(int c);
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ST_FUNC void gen_le32(int c);
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/*************************************************************/
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#else
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/*************************************************************/
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#define USING_GLOBALS
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#include "tcc.h"
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/* XXX: make it faster ? */
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ST_FUNC void g(int c)
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{
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int ind1;
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if (nocode_wanted)
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return;
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ind1 = ind + 1;
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if (ind1 > cur_text_section->data_allocated)
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section_realloc(cur_text_section, ind1);
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cur_text_section->data[ind] = c;
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ind = ind1;
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}
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ST_FUNC void gen_le16 (int i)
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{
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g(i);
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g(i>>8);
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}
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ST_FUNC void gen_le32 (int i)
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{
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gen_le16(i);
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gen_le16(i>>16);
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}
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ST_FUNC void gen_expr32(ExprValue *pe)
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{
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gen_le32(pe->v);
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}
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static void asm_emit_opcode(uint32_t opcode) {
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gen_le32(opcode);
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}
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static void asm_nullary_opcode(TCCState *s1, int token)
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{
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switch (token) {
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// Sync instructions
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case TOK_ASM_fence: // I
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asm_emit_opcode((0x3 << 2) | 3 | (0 << 12));
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return;
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case TOK_ASM_fence_i: // I
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asm_emit_opcode((0x3 << 2) | 3| (1 << 12));
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return;
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// System calls
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case TOK_ASM_scall: // I (pseudo)
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asm_emit_opcode((0x1C << 2) | 3 | (0 << 12));
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return;
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case TOK_ASM_sbreak: // I (pseudo)
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asm_emit_opcode((0x1C << 2) | 3 | (0 << 12) | (1 << 20));
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return;
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// Privileged Instructions
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case TOK_ASM_ecall:
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asm_emit_opcode((0x1C << 2) | 3 | (0 << 20));
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return;
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case TOK_ASM_ebreak:
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asm_emit_opcode((0x1C << 2) | 3 | (1 << 20));
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return;
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// Other
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case TOK_ASM_wfi:
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asm_emit_opcode((0x1C << 2) | 3 | (0x105 << 20));
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return;
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default:
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expect("nullary instruction");
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}
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}
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ST_FUNC void asm_opcode(TCCState *s1, int token)
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{
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switch (token) {
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case TOK_ASM_fence:
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case TOK_ASM_fence_i:
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case TOK_ASM_scall:
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case TOK_ASM_sbreak:
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case TOK_ASM_ecall:
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case TOK_ASM_ebreak:
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case TOK_ASM_mrts:
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case TOK_ASM_mrth:
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case TOK_ASM_hrts:
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case TOK_ASM_wfi:
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asm_nullary_opcode(s1, token);
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return;
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default:
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expect("known instruction");
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}
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}
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ST_FUNC void subst_asm_operand(CString *add_str, SValue *sv, int modifier)
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{
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tcc_error("RISCV64 asm not implemented.");
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}
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/* generate prolog and epilog code for asm statement */
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ST_FUNC void asm_gen_code(ASMOperand *operands, int nb_operands,
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int nb_outputs, int is_output,
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uint8_t *clobber_regs,
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int out_reg)
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{
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}
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ST_FUNC void asm_compute_constraints(ASMOperand *operands,
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int nb_operands, int nb_outputs,
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const uint8_t *clobber_regs,
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int *pout_reg)
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{
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}
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ST_FUNC void asm_clobber(uint8_t *clobber_regs, const char *str)
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{
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tcc_error("RISCV64 asm not implemented.");
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}
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ST_FUNC int asm_parse_regvar (int t)
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{
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tcc_error("RISCV64 asm not implemented.");
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return -1;
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}
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/*************************************************************/
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#endif /* ndef TARGET_DEFS_ONLY */
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