Commit Graph

8 Commits

Author SHA1 Message Date
Michael Matz
9b0efa9346 riscv: Make PLT reloc be AUTO_GOT
relocs against defined symbols are replaced by relative
relocs, when a GOT slot is created.  But code relocs (usually
calls via PLT) use the plt_offset member of attr, not the got_offset
member, so the "huh" warning was triggered in the case of calls to
static functions (the code still worked).

So, for now just use the AUTO_GOT_PLT mechanism.  We could also
emit a non-PLT reloc in the backend for calls to VT_STATIC functions
(like the x86-64 backend does) and do the same as for x86-64 in
build_got_entries (which transforms PLT32 into PC32 relocs, riscv
would transform CALL_PLT into CALL relocs).  Maybe later.
2019-09-01 23:13:21 +02:00
Michael Matz
31ecaa7c28 riscv: GOT loads, signed remainder, ELF flags
* support loading sym addresses from GOT: important for weak syms,
  fixes 104_inline.  This is still incomplete, it only works
  for taking the sym address, not for directly loading/storing into
  such symbols (i.e. not for VT_LVAL)
* another op: '%'
* ELF flags: add EF_RISCV_FLOAT_ABI_DOUBLE, which is our ABI.
2019-09-01 23:13:19 +02:00
Michael Matz
5fcb87138d riscv: Handle more relocs
those happen on SUSE systems.
2019-09-01 23:13:19 +02:00
Michael Matz
16edda58b7 riscv: Add more ops and fixes
* implement compares, gtst and gsym/gjmp and add
* implement stores (simple cases)
* fix arg passing with more than one register arg, fix
  loads to not always use 8byte loads
* add some predefined macros: __riscv, __riscv_xlen,
  __SIZEOF_POINTER__ (needed by glibc header)

The first 5 tests of tests2 run now.
2019-09-01 23:13:08 +02:00
Michael Matz
55040845f3 riscv: Handle JUMP_SLOT reloc
so that -run works.
2019-08-14 18:22:21 +02:00
Michael Matz
35d7b5934e riscv: hacky prolog, epilog and return
this now allows to compile a simple working example:

  int main(void) { return 0; }
2019-08-14 18:22:14 +02:00
Michael Matz
1353ccd9e2 riscv: Handle some usual relocs
this is enough to let me link a tcctest.c compiled by GCC
using some current debian sid riscv64 system.  It needs
linking against libgcc.a for various floating point TFmode
routines.  The result runs.
2019-08-14 18:19:00 +02:00
Michael Matz
0676d5bc23 riscv64: Add skeleton target 2019-08-14 18:18:46 +02:00