Commit Graph

17 Commits

Author SHA1 Message Date
herman ten brugge
cd627c6c40 Fix riscv assembler
riscv64-asm.c:
	asm_opcode: add return
	asm_parse_regvar: add abi register names

riscv64-tok.h:
	add abi register names
2022-06-07 20:53:14 +02:00
mingodad
1645616843 Revert "Move almost all global variables to TCCState, actually all tests pass on Ubuntu 18.04 x86_64"
This reverts commit af686a796b.
2021-10-22 07:39:54 +02:00
mingodad
2ce2dbcb09 Revert "Fix some errors on arm64-asm.c, rename some variables, fix several code style declarations"
This reverts commit 61537d899a.
2021-10-22 07:39:26 +02:00
mingodad
61537d899a Fix some errors on arm64-asm.c, rename some variables, fix several code style declarations 2021-10-22 07:20:00 +02:00
mingodad
af686a796b Move almost all global variables to TCCState, actually all tests pass on Ubuntu 18.04 x86_64 2021-10-21 20:09:42 +02:00
Danny Milosavljevic
9b76a64f96 riscv64-asm: Implement asm_clobber 2021-04-23 20:23:45 +02:00
Danny Milosavljevic
468f338e23 riscv64-asm: Optimize gen_le32 2021-04-23 20:23:45 +02:00
Danny Milosavljevic
99189ea707 riscv64-asm: Implement asm_parse_regvar 2021-04-23 20:23:45 +02:00
Danny Milosavljevic
b28bf50d2b riscv64-asm: Add beq, bne, blt, bge, bltu, bgeu 2021-04-23 20:23:45 +02:00
Danny Milosavljevic
9c0760a4d4 riscv64-asm: Add lb, lh, lw, lbu, lhu, ld, lwu, sb, sh, sw, sd 2021-04-23 20:23:45 +02:00
Danny Milosavljevic
1e37ec4917 riscv64-asm: Add add, addi, sub, addw, addd, addiw, addid, subw, subd, xor, xori, or, ori, and, andi, slt, slti, sltu, sltiu 2021-04-23 20:23:45 +02:00
Danny Milosavljevic
8b1a89fbdf riscv64-asm: Add sll, slli, srl, srli, sra, srai, sllw, slld, slliw, sllid, srlw, srld, srliw, srlid, sraw, srad, sraiw, sraid 2021-04-23 20:23:45 +02:00
Danny Milosavljevic
0b1cc489e1 riscv64-asm: Add lui, auipc 2021-04-23 20:23:45 +02:00
Danny Milosavljevic
e5a898e510 riscv64-asm: Add rdcycle, rdcycleh, rdtime, rdtimeh, rdinstret, rdinstreth 2021-04-23 20:23:45 +02:00
Danny Milosavljevic
4891ab71a0 riscv64-asm: Add fence, fence.i, scall, sbreak, ecall, ebreak, wfi 2021-04-23 20:23:45 +02:00
Danny Milosavljevic
7f3114ebba riscv64-asm: Remove asm_error 2021-04-23 20:23:45 +02:00
herman ten brugge
0b8ee7364a Add bound checking to arm, arm64 and riscv64
Checked on:
- i386/x86_64 (linux/windows)
- arm/arm64 (rapberry pi)
- riscv64 (simulator)
Not tested for arm softfloat because raspberry pi does not support it.

Modifications:

Makefile:
  add arm-asm.c to arm64_FILES
  add riscv64-asm.c (new file) to riscv64_FILES

lib/Makefile:
  add fetch_and_add_arm.o(new file) to ARM_O
  add fetch_and_add_arm64.o(new file) to ARM64_O
  add fetch_and_add_riscv64.o(new file) to RISCV64_O
  add $(BCHECK_O) to OBJ-arm/OBJ-arm64/OBJ-riscv64

tcc.h:
  Enable CONFIG_TCC_BCHECK for arm32/arm64/riscv64
  Add arm-asm.c, riscv64-asm.c

tcctok.h:
  for arm use memmove4 instead of memcpy4
  for arm use memmove8 instead of memcpy8

tccgen.c:
  put_extern_sym2: for arm check memcpy/memmove/memset/memmove4/memmove8
                   only use alloca for i386/x86_64
  for arm use memmove4 instead of memcpy4
  for arm use memmove8 instead of memcpy8
  fix builtin_frame_address/builtin_return_address for arm/riscv64

tccrun.c:
  Add riscv64 support
  fix rt_getcontext/rt_get_caller_pc for arm

tccelf.c:
  tcc_load_dll: Print filename for bad architecture

libtcc.c:
  add arm-asm.c/riscv64-asm.c

tcc-doc.texi:
  Add arm, arm64, riscv64 support for bound checking

lib/bcheck.c:
  add __bound___aeabi_memcpy/__bound___aeabi_memmove
      __bound___aeabi_memmove4/__bound___aeabi_memmove8
      __bound___aeabi_memset for arm
  call fetch_and_add_arm/fetch_and_add_arm64/fetch_and_add_riscv64
  __bound_init: Fix type for start/end/ad
  __bound_malloc/__bound_memalign/__bound_realloc/__bound_calloc: Use size + 1

arm-gen.c:
  add bound checking code like i386/x86_64
  assign_regs: only malloc if nb_args != 0
  gen_opi/gen_opf: Fix reload problems

arm-link.c:
  relocate_plt: Fix address calculating

arm64-gen.c:
  add bound checking code like i386/x86_64
  load/store: remove VT_BOUNDED from sv->r
  arm64_hfa_aux/arm64_hfa_aux: Fix array code
  gfunc_prolog: only malloc if n != 0

arm64-link.c:
  code_reloc/gotplt_entry_type/relocate: add R_AARCH64_LDST64_ABS_LO12_NC
  relocate: Use addXXle instead of writeXXle

riscv64-gen.c:
  add bound checking code like i386/x86_64
  add NB_ASM_REGS/CONFIG_TCC_ASM

riscv64-link.c:
  relocate: Use addXXle instead of writeXXle

i386-gen.c/x86_64-gen.c
  gen_bounds_epilog: Fix code (unrelated)

tests/Makefile:
  add $(BTESTS) for arm/arm64/riscv64

tests/tests2/Makefile:
  Use 85 only on i386/x86_64 because of asm code
  Use 113 only on i386/x86_64 because of DLL code
  Add 112/114/115/116 for arm/arm64/riscv64
  Fix FILTER (failed on riscv64)

tests/boundtest.c:
  Only use alloca for i386/x86_64
2020-06-16 07:39:48 +02:00