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arm64: Optimise some integer operations with a constant operand.
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ac70e6b840
commit
d854dede03
126
arm64-gen.c
126
arm64-gen.c
@ -1331,9 +1331,131 @@ ST_FUNC int gtst(int inv, int t)
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return gjmp(t);
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}
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static void arm64_gen_opil(int op, int l)
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static int arm64_iconst(uint64_t *val, SValue *sv)
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{
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int x, a, b;
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if ((sv->r & (VT_VALMASK | VT_LVAL | VT_SYM)) != VT_CONST)
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return 0;
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if (val) {
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int t = sv->type.t & (VT_BTYPE | VT_UNSIGNED);
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// It's crazy how TCC has all these alternatives for storing a value:
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if (t == (VT_LLONG | VT_UNSIGNED))
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*val = sv->c.ull;
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else if (t == VT_LLONG)
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*val = sv->c.ll;
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else if (t & VT_UNSIGNED)
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*val = sv->c.ui;
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else
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*val = sv->c.i;
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}
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return 1;
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}
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static int arm64_gen_opic(int op, uint32_t l, int rev, uint64_t val,
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uint32_t x, uint32_t a)
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{
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if (op == '-' && !rev) {
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val = -val;
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op = '+';
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}
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val = l ? val : (uint32_t)val;
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switch (op) {
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case '+': {
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int s = l ? val >> 63 : val >> 31;
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val = s ? -val : val;
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val = l ? val : (uint32_t)val;
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if (!(val & ~(uint64_t)0xfff))
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o(0x11000000 | l << 31 | s << 30 | x | a << 5 | val << 10);
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else if (!(val & ~(uint64_t)0xfff000))
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o(0x11400000 | l << 31 | s << 30 | x | a << 5 | val >> 12 << 10);
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else {
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arm64_movimm(30, val); // use x30
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o(0x0b1e0000 | l << 31 | s << 30 | x | a << 5);
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}
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return 1;
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}
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case '-':
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if (!val)
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o(0x4b0003e0 | l << 31 | x | a << 16); // neg
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else if (val == (l ? (uint64_t)-1 : (uint32_t)-1))
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o(0x2a2003e0 | l << 31 | x | a << 16); // mvn
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else {
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arm64_movimm(30, val); // use x30
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o(0x4b0003c0 | l << 31 | x | a << 16); // sub
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}
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return 1;
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case '^':
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if (val == -1 || (val == 0xffffffff && !l)) {
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o(0x2a2003e0 | l << 31 | x | a << 16); // mvn
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return 1;
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}
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// fall through
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case '&':
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case '|': {
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int e = arm64_encode_bimm64(l ? val : val | val << 32);
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if (e < 0)
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return 0;
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o((op == '&' ? 0x12000000 :
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op == '|' ? 0x32000000 : 0x52000000) |
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l << 31 | x | a << 5 | (uint32_t)e << 10);
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return 1;
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}
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case TOK_SAR:
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case TOK_SHL:
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case TOK_SHR: {
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uint32_t n = 32 << l;
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val = val & (n - 1);
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if (rev)
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return 0;
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if (!val)
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assert(0);
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else if (op == TOK_SHL)
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o(0x53000000 | l << 31 | l << 22 | x | a << 5 |
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(n - val) << 16 | (n - 1 - val) << 10); // lsl
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else
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o(0x13000000 | (op == TOK_SHR) << 30 | l << 31 | l << 22 |
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x | a << 5 | val << 16 | (n - 1) << 10); // lsr/asr
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return 1;
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}
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}
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return 0;
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}
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static void arm64_gen_opil(int op, uint32_t l)
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{
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uint32_t x, a, b;
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// Special treatment for operations with a constant operand:
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{
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uint64_t val;
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int rev = 1;
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if (arm64_iconst(0, &vtop[0])) {
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vswap();
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rev = 0;
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}
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if (arm64_iconst(&val, &vtop[-1])) {
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gv(RC_INT);
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a = intr(vtop[0].r);
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--vtop;
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x = get_reg(RC_INT);
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++vtop;
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if (arm64_gen_opic(op, l, rev, val, intr(x), a)) {
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vtop[0].r = x;
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vswap();
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--vtop;
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return;
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}
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}
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if (!rev)
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vswap();
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}
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gv2(RC_INT, RC_INT);
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assert(vtop[-1].r < VT_CONST && vtop[0].r < VT_CONST);
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a = intr(vtop[-1].r);
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@ -2,6 +2,7 @@
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// calling convention, but should give the same results on any architecture.
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#include <stdarg.h>
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#include <stdint.h>
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#include <stdio.h>
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struct s1 { char x[1]; } s1 = { "0" };
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@ -429,12 +430,94 @@ void movi(void)
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pll(0xabcdef0123456789);
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}
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static uint32_t addip0(uint32_t x) { return x + 0; }
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static uint64_t sublp0(uint64_t x) { return x - 0; }
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static uint32_t addip123(uint32_t x) { return x + 123; }
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static uint64_t addlm123(uint64_t x) { return x + -123; }
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static uint64_t sublp4095(uint64_t x) { return x - 4095; }
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static uint32_t subim503808(uint32_t x) { return x - -503808; }
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static uint64_t addp12345(uint64_t x) { return x + 12345; }
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static uint32_t subp12345(uint32_t x) { return x - 12345; }
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static uint32_t mvni(uint32_t x) { return 0xffffffff - x; }
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static uint64_t negl(uint64_t x) { return 0 - x; }
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static uint32_t rsbi123(uint32_t x) { return 123 - x; }
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static uint64_t rsbl123(uint64_t x) { return 123 - x; }
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static uint32_t andi0(uint32_t x) { return x & 0; }
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static uint64_t andlm1(uint64_t x) { return x & -1; }
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static uint64_t orrl0(uint64_t x) { return x | 0; }
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static uint32_t orrim1(uint32_t x) { return x | -1; }
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static uint32_t eori0(uint32_t x) { return x ^ 0; }
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static uint64_t eorlm1(uint64_t x) { return x ^ -1; }
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static uint32_t and0xf0(uint32_t x) { return x & 0xf0; }
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static uint64_t orr0xf0(uint64_t x) { return x | 0xf0; }
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static uint64_t eor0xf0(uint64_t x) { return x ^ 0xf0; }
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static uint32_t lsli0(uint32_t x) { return x << 0; }
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static uint32_t lsri0(uint32_t x) { return x >> 0; }
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static int64_t asrl0(int64_t x) { return x >> 0; }
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static uint32_t lsli1(uint32_t x) { return x << 1; }
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static uint32_t lsli31(uint32_t x) { return x << 31; }
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static uint64_t lsll1(uint64_t x) { return x << 1; }
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static uint64_t lsll63(uint64_t x) { return x << 63; }
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static uint32_t lsri1(uint32_t x) { return x >> 1; }
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static uint32_t lsri31(uint32_t x) { return x >> 31; }
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static uint64_t lsrl1(uint64_t x) { return x >> 1; }
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static uint64_t lsrl63(uint64_t x) { return x >> 63; }
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static int32_t asri1(int32_t x) { return x >> 1; }
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static int32_t asri31(int32_t x) { return x >> 31; }
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static int64_t asrl1(int64_t x) { return x >> 1; }
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static int64_t asrl63(int64_t x) { return x >> 63; }
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void opi(void)
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{
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int x = 1000;
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pll(addip0(x));
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pll(sublp0(x));
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pll(addip123(x));
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pll(addlm123(x));
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pll(sublp4095(x));
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pll(subim503808(x));
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pll(addp12345(x));
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pll(subp12345(x));
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pll(mvni(x));
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pll(negl(x));
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pll(rsbi123(x));
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pll(rsbl123(x));
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pll(andi0(x));
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pll(andlm1(x));
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pll(orrl0(x));
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pll(orrim1(x));
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pll(eori0(x));
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pll(eorlm1(x));
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pll(and0xf0(x));
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pll(orr0xf0(x));
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pll(eor0xf0(x));
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pll(lsli0(x));
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pll(lsri0(x));
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pll(asrl0(x));
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pll(lsli1(x));
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pll(lsli31(x));
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pll(lsll1(x));
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pll(lsll63(x));
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pll(lsri1(x));
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pll(lsri31(x));
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pll(lsrl1(x));
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pll(lsrl63(x));
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pll(asri1(x));
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pll(asri31(x));
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pll(asrl1(x));
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pll(asrl63(x));
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}
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void pcs(void)
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{
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arg();
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ret();
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stdarg();
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movi();
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opi();
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}
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int main()
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@ -136,3 +136,39 @@ abcd1234ffffffff
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ffffef0123456789
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abcdef012345ffff
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abcdef0123456789
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3e8
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3e8
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463
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36d
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fffffffffffff3e9
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7b3e8
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3421
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ffffd3af
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fffffc17
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fffffffffffffc18
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fffffc93
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fffffffffffffc93
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0
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3e8
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3e8
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ffffffff
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3e8
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fffffffffffffc17
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e0
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3f8
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318
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3e8
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3e8
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3e8
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7d0
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0
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7d0
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0
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1f4
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0
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1f4
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0
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1f4
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0
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1f4
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0
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