From d55a3f3362943d128cb93763e2341b56c09a2cad Mon Sep 17 00:00:00 2001
From: herman ten brugge <hermantenbrugge@home.nl>
Date: Thu, 30 Jul 2020 09:40:35 +0200
Subject: [PATCH] Fix riscv64 compare problem.

Fix 64->32 bits sign/zero extention for riscv64.
---
 tccgen.c                    | 10 ++++++----
 tests/tests2/117_gcc_test.c | 13 +++++++++++++
 2 files changed, 19 insertions(+), 4 deletions(-)

diff --git a/tccgen.c b/tccgen.c
index 5f124cbb..cd236fda 100644
--- a/tccgen.c
+++ b/tccgen.c
@@ -3605,10 +3605,12 @@ again:
             }
             ss = ds, ds = 4, dbt = sbt;
         } else if (ss == 8) {
-            /* XXX some architectures (e.g. risc-v) would like it
-               better for this merely being a 32-to-64 sign or zero-
-               extension.  */
-            trunc = 32; /* zero upper 32 bits */
+            /* RISC-V keeps 32bit vals in registers sign-extended.
+               So here we need a sign-extension for signed types and
+               zero-extension. for unsigned types. */
+#if !defined(TCC_TARGET_RISCV64)
+            trunc = 32; /* zero upper 32 bits for non RISC-V targets */
+#endif
         } else {
             ss = 4;
         }
diff --git a/tests/tests2/117_gcc_test.c b/tests/tests2/117_gcc_test.c
index 52b5af7f..8b3b782a 100644
--- a/tests/tests2/117_gcc_test.c
+++ b/tests/tests2/117_gcc_test.c
@@ -117,6 +117,18 @@ void tst_builtin(void)
 #endif
 }
 
+int tst(void)
+{
+  long value = 3;
+  return -value;
+}
+
+void tst_compare(void)
+{
+  /* This failed on risc64 */
+  if (tst() > 0) printf ("error\n");
+}
+
 int
 main (void)
 {
@@ -131,4 +143,5 @@ main (void)
   tst_big(big);
   tst_adr(&sprintf);
   tst_builtin();
+  tst_compare();
 }