Fix riscv assembler

riscv64-asm.c:
	asm_opcode: add return
	asm_parse_regvar: add abi register names

riscv64-tok.h:
	add abi register names
This commit is contained in:
herman ten brugge 2022-06-07 20:53:14 +02:00
parent afc136262e
commit cd627c6c40
2 changed files with 6 additions and 3 deletions

View File

@ -643,6 +643,7 @@ ST_FUNC void asm_opcode(TCCState *s1, int token)
case TOK_ASM_sltu: case TOK_ASM_sltu:
case TOK_ASM_sltiu: case TOK_ASM_sltiu:
asm_data_processing_opcode(s1, token); asm_data_processing_opcode(s1, token);
return;
case TOK_ASM_lb: case TOK_ASM_lb:
case TOK_ASM_lh: case TOK_ASM_lh:
@ -712,9 +713,13 @@ ST_FUNC void asm_clobber(uint8_t *clobber_regs, const char *str)
ST_FUNC int asm_parse_regvar (int t) ST_FUNC int asm_parse_regvar (int t)
{ {
if (t >= TOK_ASM_x0 && t <= TOK_ASM_pc) { /* register name */ if (t >= TOK_ASM_x0 && t <= TOK_ASM_pc) { /* register name */
if (t >= TOK_ASM_zero && t <= TOK_ASM_t6)
return t - TOK_ASM_zero;
switch (t) { switch (t) {
case TOK_ASM_s0:
return 8;
case TOK_ASM_pc: case TOK_ASM_pc:
return -1; // TODO: Figure out where it can be used after all tcc_error("PC register not implemented.");
default: default:
return t - TOK_ASM_x0; return t - TOK_ASM_x0;
} }

View File

@ -41,7 +41,6 @@
/* register macros */ /* register macros */
DEF_ASM(zero) DEF_ASM(zero)
/*
DEF_ASM(ra) DEF_ASM(ra)
DEF_ASM(sp) DEF_ASM(sp)
DEF_ASM(gp) DEF_ASM(gp)
@ -75,7 +74,6 @@
DEF_ASM(t6) DEF_ASM(t6)
DEF_ASM(s0) // = x8 DEF_ASM(s0) // = x8
*/
DEF_ASM(pc) DEF_ASM(pc)