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x86-64-asm: Fix ltr/str and push/pop operands

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str accepts rm16/r32/r64, and push/pop defaults to 64 when given
memory operands (to 32 on i386).
This commit is contained in:
Michael Matz 2016-08-06 23:19:04 +02:00
parent 45b24c37a0
commit c0368604e1
3 changed files with 12 additions and 2 deletions
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3
i386-asm.c
View File

@ -869,6 +869,9 @@ ST_FUNC void asm_opcode(TCCState *s1, int opcode)
if ((opcode == TOK_ASM_push || opcode == TOK_ASM_pop) && if ((opcode == TOK_ASM_push || opcode == TOK_ASM_pop) &&
(ops[0].type & (OP_SEG | OP_IM8S | OP_IM32))) (ops[0].type & (OP_SEG | OP_IM8S | OP_IM32)))
s = 2; s = 2;
else if ((opcode == TOK_ASM_push || opcode == TOK_ASM_pop) &&
(ops[0].type & OP_EA))
s = NBWLX - 2;
else else
tcc_error("cannot infer opcode suffix"); tcc_error("cannot infer opcode suffix");
} }

5
tests/asmtest.S
View File

@ -125,6 +125,8 @@ notl %r15d
push %gs push %gs
push $1 push $1
push $100 push $100
push 0x42(%eax)
pop 0x43(%esi)
#ifdef __i386__ #ifdef __i386__
popl %eax popl %eax
@ -740,8 +742,11 @@ int $0x10
lmsw 0x1000 lmsw 0x1000
lsl 0x1000, %ecx lsl 0x1000, %ecx
ltr 0x1000 ltr 0x1000
ltr %si
smsw 0x1000 smsw 0x1000
str 0x1000 str 0x1000
str %ecx
str %dx
verr 0x1000 verr 0x1000
verw 0x1000 verw 0x1000

6
x86_64-asm.h
View File

@ -367,14 +367,16 @@ ALT(DEF_ASM_OP2(larw, 0x0f02, 0, OPC_MODRM | OPC_WLX, OPT_REG | OPT_EA, OPT_REG)
DEF_ASM_OP1(lldt, 0x0f00, 2, OPC_MODRM, OPT_EA | OPT_REG) DEF_ASM_OP1(lldt, 0x0f00, 2, OPC_MODRM, OPT_EA | OPT_REG)
DEF_ASM_OP1(lmsw, 0x0f01, 6, OPC_MODRM, OPT_EA | OPT_REG) DEF_ASM_OP1(lmsw, 0x0f01, 6, OPC_MODRM, OPT_EA | OPT_REG)
ALT(DEF_ASM_OP2(lslw, 0x0f03, 0, OPC_MODRM | OPC_WLX, OPT_EA | OPT_REG, OPT_REG)) ALT(DEF_ASM_OP2(lslw, 0x0f03, 0, OPC_MODRM | OPC_WLX, OPT_EA | OPT_REG, OPT_REG))
DEF_ASM_OP1(ltr, 0x0f00, 3, OPC_MODRM, OPT_EA | OPT_REG) DEF_ASM_OP1(ltr, 0x0f00, 3, OPC_MODRM, OPT_EA | OPT_REG16)
DEF_ASM_OP1(sgdt, 0x0f01, 0, OPC_MODRM, OPT_EA) DEF_ASM_OP1(sgdt, 0x0f01, 0, OPC_MODRM, OPT_EA)
DEF_ASM_OP1(sgdtq, 0x0f01, 0, OPC_MODRM, OPT_EA) DEF_ASM_OP1(sgdtq, 0x0f01, 0, OPC_MODRM, OPT_EA)
DEF_ASM_OP1(sidt, 0x0f01, 1, OPC_MODRM, OPT_EA) DEF_ASM_OP1(sidt, 0x0f01, 1, OPC_MODRM, OPT_EA)
DEF_ASM_OP1(sidtq, 0x0f01, 1, OPC_MODRM, OPT_EA) DEF_ASM_OP1(sidtq, 0x0f01, 1, OPC_MODRM, OPT_EA)
DEF_ASM_OP1(sldt, 0x0f00, 0, OPC_MODRM, OPT_REG | OPT_EA) DEF_ASM_OP1(sldt, 0x0f00, 0, OPC_MODRM, OPT_REG | OPT_EA)
DEF_ASM_OP1(smsw, 0x0f01, 4, OPC_MODRM, OPT_REG | OPT_EA) DEF_ASM_OP1(smsw, 0x0f01, 4, OPC_MODRM, OPT_REG | OPT_EA)
DEF_ASM_OP1(str, 0x0f00, 1, OPC_MODRM, OPT_REG16| OPT_EA) DEF_ASM_OP1(str, 0x0f00, 1, OPC_MODRM, OPT_REG32 | OPT_EA)
ALT(DEF_ASM_OP1(str, 0x660f00, 1, OPC_MODRM, OPT_REG16))
ALT(DEF_ASM_OP1(str, 0x480f00, 1, OPC_MODRM, OPT_REG64))
DEF_ASM_OP1(verr, 0x0f00, 4, OPC_MODRM, OPT_REG | OPT_EA) DEF_ASM_OP1(verr, 0x0f00, 4, OPC_MODRM, OPT_REG | OPT_EA)
DEF_ASM_OP1(verw, 0x0f00, 5, OPC_MODRM, OPT_REG | OPT_EA) DEF_ASM_OP1(verw, 0x0f00, 5, OPC_MODRM, OPT_REG | OPT_EA)
DEF_ASM_OP0L(swapgs, 0x0f01, 7, OPC_MODRM) DEF_ASM_OP0L(swapgs, 0x0f01, 7, OPC_MODRM)