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x86: Improve cmov handling
cmov can accept multi sizes, but is also a OPC_TEST opcode, deal with this.
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@ -659,6 +659,11 @@ ST_FUNC void asm_opcode(TCCState *s1, int opcode)
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} else if (pa->instr_type & OPC_TEST) {
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} else if (pa->instr_type & OPC_TEST) {
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if (!(opcode >= pa->sym && opcode < pa->sym + NB_TEST_OPCODES))
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if (!(opcode >= pa->sym && opcode < pa->sym + NB_TEST_OPCODES))
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continue;
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continue;
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/* cmovxx is a test opcode but accepts multiple sizes.
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TCC doesn't accept the suffixed mnemonic, instead we
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simply force size autodetection always. */
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if (pa->instr_type & OPC_WLX)
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s = NBWLX - 1;
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} else if (pa->instr_type & OPC_B) {
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} else if (pa->instr_type & OPC_B) {
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#ifdef TCC_TARGET_X86_64
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#ifdef TCC_TARGET_X86_64
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/* Some instructions don't have the full size but only
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/* Some instructions don't have the full size but only
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@ -382,7 +382,7 @@ ALT(DEF_ASM_OP2(cmpxchgb, 0x0fb0, 0, OPC_MODRM | OPC_BWL, OPT_REG, OPT_REG | OPT
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DEF_ASM_OP1(cmpxchg8b, 0x0fc7, 1, OPC_MODRM, OPT_EA )
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DEF_ASM_OP1(cmpxchg8b, 0x0fc7, 1, OPC_MODRM, OPT_EA )
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/* pentium pro */
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/* pentium pro */
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ALT(DEF_ASM_OP2(cmovo, 0x0f40, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
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ALT(DEF_ASM_OP2(cmovo, 0x0f40, 0, OPC_MODRM | OPC_TEST | OPC_WL, OPT_REGW | OPT_EA, OPT_REGW))
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#ifdef I386_ASM_16
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#ifdef I386_ASM_16
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ALT(DEF_ASM_OP2(cmovno, 0x0f41, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
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ALT(DEF_ASM_OP2(cmovno, 0x0f41, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
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ALT(DEF_ASM_OP2(cmovc, 0x0f42, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
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ALT(DEF_ASM_OP2(cmovc, 0x0f42, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
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@ -474,6 +474,10 @@ fucomip %st(5), %st
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cmovo 0x1000, %eax
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cmovo 0x1000, %eax
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cmovs 0x1000, %eax
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cmovs 0x1000, %eax
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cmovns %edx, %edi
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cmovns %edx, %edi
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cmovne %ax, %si
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#ifdef __x86_64__
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cmovz %rdi,%rbx
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#endif
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int $3
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int $3
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int $0x10
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int $0x10
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@ -367,14 +367,7 @@ ALT(DEF_ASM_OP2(cmpxchgb, 0x0fb0, 0, OPC_MODRM | OPC_BWLQ, OPT_REG, OPT_REG | OP
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DEF_ASM_OP1(cmpxchg8b, 0x0fc7, 1, OPC_MODRM, OPT_EA )
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DEF_ASM_OP1(cmpxchg8b, 0x0fc7, 1, OPC_MODRM, OPT_EA )
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/* pentium pro */
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/* pentium pro */
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ALT(DEF_ASM_OP2(cmovo, 0x0f40, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
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ALT(DEF_ASM_OP2(cmovo, 0x0f40, 0, OPC_MODRM | OPC_TEST | OPC_WLQ, OPT_REGW | OPT_EA, OPT_REGW))
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ALT(DEF_ASM_OP2(cmovno, 0x0f41, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
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ALT(DEF_ASM_OP2(cmovc, 0x0f42, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
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ALT(DEF_ASM_OP2(cmovnc, 0x0f43, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
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ALT(DEF_ASM_OP2(cmovz, 0x0f44, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
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ALT(DEF_ASM_OP2(cmovnz, 0x0f45, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
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ALT(DEF_ASM_OP2(cmovna, 0x0f46, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
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ALT(DEF_ASM_OP2(cmova, 0x0f47, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
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DEF_ASM_OP2(fcmovb, 0xdac0, 0, OPC_REG, OPT_ST, OPT_ST0 )
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DEF_ASM_OP2(fcmovb, 0xdac0, 0, OPC_REG, OPT_ST, OPT_ST0 )
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DEF_ASM_OP2(fcmove, 0xdac8, 0, OPC_REG, OPT_ST, OPT_ST0 )
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DEF_ASM_OP2(fcmove, 0xdac8, 0, OPC_REG, OPT_ST, OPT_ST0 )
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