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arm-asm: Raise error if asm_data_processing_opcode and asm_shift_opcode try to use PC for register-controlled shifts
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parent
79567004b4
commit
86cc9c587b
19
arm-asm.c
19
arm-asm.c
@ -529,6 +529,13 @@ static void asm_data_processing_opcode(TCCState *s1, int token)
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return;
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} else {
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uint32_t opcode = 0;
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if (nb_shift && shift.type == OP_REG32) {
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if ((ops[0].type == OP_REG32 && ops[0].reg == 15) ||
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(ops[1].type == OP_REG32 && ops[1].reg == 15)) {
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tcc_error("Using the 'pc' register in data processing instructions that have a register-controlled shift is not implemented by ARM");
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return;
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}
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}
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// data processing (general case):
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// operands:
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@ -655,9 +662,10 @@ static void asm_shift_opcode(TCCState *s1, int token)
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return;
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}
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if (ops[0].type != OP_REG32)
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if (ops[0].type != OP_REG32) {
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expect("(destination operand) register");
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else
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return;
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} else
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operands |= ENCODE_RD(ops[0].reg);
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if (nb_ops == 2) {
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@ -694,6 +702,13 @@ static void asm_shift_opcode(TCCState *s1, int token)
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break;
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}
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if (ops[2].type == OP_REG32) {
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if ((ops[0].type == OP_REG32 && ops[0].reg == 15) ||
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(ops[1].type == OP_REG32 && ops[1].reg == 15)) {
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tcc_error("Using the 'pc' register in data processing instructions that have a register-controlled shift is not implemented by ARM");
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}
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}
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if (operands & ENCODE_IMMEDIATE_FLAG)
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operands |= asm_encode_rotation(&ops[2]);
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else
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