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recursive Makefiles should use $(MAKE), not "make"
add clean: target for lib/tcc1.def
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parent
c7a4e11bf1
commit
1f62f2253c
6
Makefile
6
Makefile
@ -197,10 +197,10 @@ tcc1.def:
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echo "#define HOST_I386 1" >> config.h
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echo "CFLAGS=-O2 -g -pipe -Wall -m32" >> config.mak
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echo "ARCH=i386" >> config.mak
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make i386-win32-tcc
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$(MAKE) i386-win32-tcc
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cp i386-win32-tcc tcc.exe
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mv libtcc1.a libtcc1.bak
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make CONFIG_WIN32=1 libtcc1.a
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$(MAKE) CONFIG_WIN32=1 libtcc1.a
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mv libtcc1.a lib/tcc1.def
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mv libtcc1.bak libtcc1.a
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mv config.mak.bak config.mak
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@ -327,7 +327,7 @@ tar:
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$(MAKE) -C tests $@
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clean:
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rm -vf $(PROGS) tcc_p$(EXESUF) tcc.pod *~ *.o *.a *.out *.so* *.exe libtcc_test$(EXESUF)
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rm -vf $(PROGS) tcc_p$(EXESUF) tcc.pod *~ *.o *.a *.out *.so* *.exe libtcc_test$(EXESUF) lib/tcc1.def
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$(MAKE) -C tests $@
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distclean: clean
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