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fixup! riscv: Implement large addend for global address
Use `t1` instead of `t0` for the cases when `rr` is not set so `t0` is used by default and this happens: lui t0, XXX add t0, t0, t0 Instead, now we do: lui t1, XXX add t0, t0, t1
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@ -193,8 +193,8 @@ static int load_symofs(int r, SValue *sv, int forstore)
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if (doload) {
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EI(0x03, 3, rr, rr, 0); // ld RR, 0(RR)
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if (large_addend) {
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o(0x37 | (5 << 7) | ((0x800 + fc) & 0xfffff000)); //lui t0, high(fc)
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ER(0x33, 0, rr, rr, 5, 0); // add RR, RR, t0
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o(0x37 | (6 << 7) | ((0x800 + fc) & 0xfffff000)); //lui t1, high(fc)
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ER(0x33, 0, rr, rr, 6, 0); // add RR, RR, t1
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sv->c.i = fc << 20 >> 20;
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}
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}
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