mirror of
https://github.com/mirror/tinycc.git
synced 2024-12-28 04:00:06 +08:00
532 lines
13 KiB
C
532 lines
13 KiB
C
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/******************************************************/
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/* X86 code generator */
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/* number of available registers */
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#define NB_REGS 4
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#define NB_REG_CLASSES 2
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/* a register can belong to several classes */
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#define REG_CLASS_INT 0x0001
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#define REG_CLASS_FLOAT 0x0002
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/* pretty names for the registers */
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enum {
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REG_EAX = 0,
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REG_ECX,
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REG_EDX,
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REG_ST0,
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};
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int reg_classes[NB_REGS] = {
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REG_CLASS_INT, /* eax */
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REG_CLASS_INT, /* ecx */
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REG_CLASS_INT, /* edx */
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REG_CLASS_FLOAT, /* st0 */
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};
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/* integer return register for functions */
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#define FUNC_RET_REG 0
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/* float return register for functions */
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#define FUNC_RET_FREG 3
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/* defined if function parameters must be evaluated in reverse order */
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#define INVERT_FUNC_PARAMS
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/* defined if structures are passed as pointers. Otherwise structures
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are directly pushed on stack. */
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//#define FUNC_STRUCT_PARAM_AS_PTR
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/* function call context */
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typedef struct GFuncContext {
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int args_size;
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} GFuncContext;
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/******************************************************/
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void g(int c)
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{
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*(char *)ind++ = c;
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}
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void o(int c)
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{
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while (c) {
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g(c);
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c = c / 256;
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}
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}
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void gen_le32(int c)
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{
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g(c);
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g(c >> 8);
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g(c >> 16);
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g(c >> 24);
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}
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/* add a new relocation entry to symbol 's' */
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void greloc(Sym *s, int addr, int type)
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{
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Reloc *p;
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p = malloc(sizeof(Reloc));
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if (!p)
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error("memory full");
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p->type = type;
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p->addr = addr;
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p->next = (Reloc *)s->c;
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s->c = (int)p;
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}
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/* patch each relocation entry with value 'val' */
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void greloc_patch(Sym *s, int val)
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{
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Reloc *p, *p1;
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p = (Reloc *)s->c;
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while (p != NULL) {
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p1 = p->next;
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switch(p->type) {
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case RELOC_ADDR32:
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*(int *)p->addr = val;
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break;
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case RELOC_REL32:
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*(int *)p->addr = val - p->addr - 4;
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break;
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}
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free(p);
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p = p1;
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}
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s->c = val;
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s->t &= ~VT_FORWARD;
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}
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/* output a symbol and patch all calls to it */
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void gsym_addr(t, a)
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{
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int n;
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while (t) {
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n = *(int *)t; /* next value */
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*(int *)t = a - t - 4;
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t = n;
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}
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}
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void gsym(t)
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{
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gsym_addr(t, ind);
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}
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/* psym is used to put an instruction with a data field which is a
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reference to a symbol. It is in fact the same as oad ! */
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#define psym oad
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/* instruction + 4 bytes data. Return the address of the data */
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int oad(int c, int s)
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{
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o(c);
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*(int *)ind = s;
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s = ind;
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ind = ind + 4;
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return s;
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}
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/* output constant with relocation if 't & VT_FORWARD' is true */
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void gen_addr32(int c, int t)
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{
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if (!(t & VT_FORWARD)) {
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gen_le32(c);
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} else {
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greloc((Sym *)c, ind, RELOC_ADDR32);
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gen_le32(0);
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}
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}
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/* XXX: generate correct pointer for forward references to functions */
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/* r = (ft, fc) */
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void load(int r, int ft, int fc)
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{
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int v, t;
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v = ft & VT_VALMASK;
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if (ft & VT_LVAL) {
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if (v == VT_LLOCAL) {
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load(r, VT_LOCAL | VT_LVAL, fc);
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v = r;
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}
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if ((ft & VT_BTYPE) == VT_FLOAT) {
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o(0xd9); /* flds */
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r = 0;
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} else if ((ft & VT_BTYPE) == VT_DOUBLE) {
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o(0xdd); /* fldl */
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r = 0;
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} else if ((ft & VT_TYPE) == VT_BYTE)
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o(0xbe0f); /* movsbl */
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else if ((ft & VT_TYPE) == (VT_BYTE | VT_UNSIGNED))
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o(0xb60f); /* movzbl */
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else if ((ft & VT_TYPE) == VT_SHORT)
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o(0xbf0f); /* movswl */
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else if ((ft & VT_TYPE) == (VT_SHORT | VT_UNSIGNED))
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o(0xb70f); /* movzwl */
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else
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o(0x8b); /* movl */
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if (v == VT_CONST) {
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o(0x05 + r * 8); /* 0xXX, r */
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gen_addr32(fc, ft);
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} else if (v == VT_LOCAL) {
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oad(0x85 + r * 8, fc); /* xx(%ebp), r */
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} else {
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g(0x00 + r * 8 + v); /* (v), r */
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}
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} else {
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if (v == VT_CONST) {
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o(0xb8 + r); /* mov $xx, r */
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gen_addr32(fc, ft);
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} else if (v == VT_LOCAL) {
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o(0x8d);
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oad(0x85 + r * 8, fc); /* lea xxx(%ebp), r */
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} else if (v == VT_CMP) {
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oad(0xb8 + r, 0); /* mov $0, r */
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o(0x0f); /* setxx %br */
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o(fc);
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o(0xc0 + r);
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} else if (v == VT_JMP || v == VT_JMPI) {
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t = v & 1;
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oad(0xb8 + r, t); /* mov $1, r */
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oad(0xe9, 5); /* jmp after */
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gsym(fc);
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oad(0xb8 + r, t ^ 1); /* mov $0, r */
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} else if (v != r) {
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o(0x89);
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o(0xc0 + r + v * 8); /* mov v, r */
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}
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}
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}
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/* (ft, fc) = r */
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/* WARNING: r must not be allocated on the stack */
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void store(r, ft, fc)
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{
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int fr, bt;
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fr = ft & VT_VALMASK;
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bt = ft & VT_BTYPE;
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/* XXX: incorrect if reg to reg */
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if (bt == VT_FLOAT) {
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o(0xd9); /* fstps */
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r = 3;
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} else if (bt == VT_DOUBLE) {
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o(0xdd); /* fstpl */
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r = 3;
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} else {
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if (bt == VT_SHORT)
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o(0x66);
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if (bt == VT_BYTE)
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o(0x88);
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else
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o(0x89);
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}
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if (fr == VT_CONST) {
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o(0x05 + r * 8); /* mov r,xxx */
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gen_addr32(fc, ft);
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} else if (fr == VT_LOCAL) {
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oad(0x85 + r * 8, fc); /* mov r,xxx(%ebp) */
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} else if (ft & VT_LVAL) {
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g(fr + r * 8); /* mov r, (fr) */
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} else if (fr != r) {
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o(0xc0 + fr + r * 8); /* mov r, fr */
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}
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}
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/* start function call and return function call context */
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void gfunc_start(GFuncContext *c)
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{
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c->args_size = 0;
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}
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/* push function parameter which is in (vt, vc) */
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void gfunc_param(GFuncContext *c)
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{
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int size, align, ft, fc, r;
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if ((vt & (VT_BTYPE | VT_LVAL)) == (VT_STRUCT | VT_LVAL)) {
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size = type_size(vt, &align);
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/* align to stack align size */
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size = (size + 3) & ~3;
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/* allocate the necessary size on stack */
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oad(0xec81, size); /* sub $xxx, %esp */
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/* generate structure store */
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r = get_reg(REG_CLASS_INT);
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o(0x89); /* mov %esp, r */
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o(0xe0 + r);
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ft = vt;
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fc = vc;
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vset(VT_INT | r, 0);
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vpush();
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vt = ft;
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vc = fc;
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vstore();
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c->args_size += size;
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} else if ((vt & VT_BTYPE) == VT_DOUBLE ||
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(vt & VT_BTYPE) == VT_FLOAT) {
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gv(); /* only one float register */
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if ((vt & VT_BTYPE) == VT_FLOAT)
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size = 4;
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else
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size = 8;
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oad(0xec81, size); /* sub $xxx, %esp */
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o(0x245cd9 + size - 4); /* fstp[s|l] 0(%esp) */
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g(0x00);
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c->args_size += 8;
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} else {
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/* simple type (currently always same size) */
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/* XXX: implicit cast ? */
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r = gv();
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o(0x50 + r); /* push r */
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c->args_size += 4;
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}
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}
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/* generate function call with address in (vt, vc) and free function
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context */
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void gfunc_call(GFuncContext *c)
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{
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int r;
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if ((vt & (VT_VALMASK | VT_LVAL)) == VT_CONST) {
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/* constant case */
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/* forward reference */
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if (vt & VT_FORWARD) {
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greloc((Sym *)vc, ind + 1, RELOC_REL32);
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oad(0xe8, 0);
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} else {
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oad(0xe8, vc - ind - 5);
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}
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} else {
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/* otherwise, indirect call */
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r = gv();
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o(0xff); /* call *r */
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o(0xd0 + r);
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}
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if (c->args_size)
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oad(0xc481, c->args_size); /* add $xxx, %esp */
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}
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int gjmp(int t)
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{
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return psym(0xe9, t);
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}
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/* generate a test. set 'inv' to invert test */
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int gtst(int inv, int t)
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{
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int v, *p;
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v = vt & VT_VALMASK;
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if (v == VT_CMP) {
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/* fast case : can jump directly since flags are set */
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g(0x0f);
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t = psym((vc - 16) ^ inv, t);
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} else if (v == VT_JMP || v == VT_JMPI) {
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/* && or || optimization */
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if ((v & 1) == inv) {
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/* insert vc jump list in t */
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p = &vc;
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while (*p != 0)
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p = (int *)*p;
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*p = t;
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t = vc;
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} else {
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t = gjmp(t);
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gsym(vc);
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}
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} else if ((vt & (VT_VALMASK | VT_LVAL)) == VT_CONST) {
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/* constant jmp optimization */
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if ((vc != 0) != inv)
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t = gjmp(t);
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} else {
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v = gv();
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o(0x85);
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o(0xc0 + v * 9);
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g(0x0f);
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t = psym(0x85 ^ inv, t);
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}
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return t;
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}
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/* generate an integer binary operation 'v = r op fr' instruction and
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modifies (vt,vc) if needed */
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void gen_opi(int op, int r, int fr)
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{
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int t;
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if (op == '+') {
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o(0x01);
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o(0xc0 + r + fr * 8);
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} else if (op == '-') {
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o(0x29);
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o(0xc0 + r + fr * 8);
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} else if (op == '&') {
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o(0x21);
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o(0xc0 + r + fr * 8);
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} else if (op == '^') {
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o(0x31);
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o(0xc0 + r + fr * 8);
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} else if (op == '|') {
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o(0x09);
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o(0xc0 + r + fr * 8);
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} else if (op == '*') {
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o(0xaf0f); /* imul fr, r */
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o(0xc0 + fr + r * 8);
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} else if (op == TOK_SHL | op == TOK_SHR | op == TOK_SAR) {
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/* op2 is %ecx */
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if (fr != 1) {
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if (r == 1) {
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r = fr;
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fr = 1;
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o(0x87); /* xchg r, %ecx */
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o(0xc1 + r * 8);
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} else
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move_reg(1, fr);
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}
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o(0xd3); /* shl/shr/sar %cl, r */
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if (op == TOK_SHL)
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o(0xe0 + r);
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else if (op == TOK_SHR)
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o(0xe8 + r);
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else
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o(0xf8 + r);
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vt = (vt & VT_TYPE) | r;
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} else if (op == '/' | op == TOK_UDIV | op == TOK_PDIV |
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op == '%' | op == TOK_UMOD) {
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save_reg(2); /* save edx */
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t = save_reg_forced(fr); /* save fr and get op2 location */
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move_reg(0, r); /* op1 is %eax */
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if (op == TOK_UDIV | op == TOK_UMOD) {
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o(0xf7d231); /* xor %edx, %edx, div t(%ebp), %eax */
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oad(0xb5, t);
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} else {
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o(0xf799); /* cltd, idiv t(%ebp), %eax */
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oad(0xbd, t);
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}
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if (op == '%' | op == TOK_UMOD)
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r = 2;
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else
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r = 0;
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vt = (vt & VT_TYPE) | r;
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} else {
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o(0x39);
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o(0xc0 + r + fr * 8); /* cmp fr, r */
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vset(VT_CMP, op);
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}
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}
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/* generate a floating point operation 'v = t1 op t2' instruction and
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modifies (vt,vc) if needed */
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/* NOTE: floats can only be lvalues */
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void gen_opf(int op)
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{
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int a, ft, fc, swapped, r;
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/* must put at least one value in the floating point register */
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if ((vstack_ptr[-4] & VT_LVAL) &&
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(vstack_ptr[-2] & VT_LVAL)) {
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vswap();
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vpop(&vt, &vc);
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gv();
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vpush();
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vswap();
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}
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if (op >= TOK_EQ && op <= TOK_GT) {
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/* load on stack second operand */
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||
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load(REG_ST0, vstack_ptr[-2], vstack_ptr[-1]);
|
||
|
if (op == TOK_GE || op == TOK_GT)
|
||
|
o(0xc9d9); /* fxch %st(1) */
|
||
|
o(0xe9da); /* fucompp */
|
||
|
o(0xe0df); /* fnstsw %ax */
|
||
|
if (op == TOK_EQ) {
|
||
|
o(0x45e480); /* and $0x45, %ah */
|
||
|
o(0x40fC80); /* cmp $0x40, %ah */
|
||
|
} else if (op == TOK_NE) {
|
||
|
o(0x45e480); /* and $0x45, %ah */
|
||
|
o(0x40f480); /* xor $0x40, %ah */
|
||
|
op = TOK_NE;
|
||
|
} else if (op == TOK_GE || op == TOK_LE) {
|
||
|
o(0x05c4f6); /* test $0x05, %ah */
|
||
|
op = TOK_EQ;
|
||
|
} else {
|
||
|
o(0x45c4f6); /* test $0x45, %ah */
|
||
|
op = TOK_EQ;
|
||
|
}
|
||
|
vstack_ptr[-4] = (vstack_ptr[-4] & VT_TYPE) | VT_CMP;
|
||
|
vstack_ptr[-3] = op;
|
||
|
} else {
|
||
|
/* swap the stack if needed so that t1 is the register and t2 is
|
||
|
the memory reference */
|
||
|
swapped = 0;
|
||
|
if (vstack_ptr[-4] & VT_LVAL) {
|
||
|
vswap();
|
||
|
swapped = 1;
|
||
|
}
|
||
|
|
||
|
switch(op) {
|
||
|
default:
|
||
|
case '+':
|
||
|
a = 0;
|
||
|
break;
|
||
|
case '-':
|
||
|
a = 0x20;
|
||
|
if (swapped)
|
||
|
a += 8;
|
||
|
break;
|
||
|
case '*':
|
||
|
a = 0x08;
|
||
|
break;
|
||
|
case '/':
|
||
|
a = 0x30;
|
||
|
if (swapped)
|
||
|
a += 8;
|
||
|
break;
|
||
|
}
|
||
|
ft = vstack_ptr[-2];
|
||
|
fc = vstack_ptr[-1];
|
||
|
if ((ft & VT_BTYPE) == VT_DOUBLE)
|
||
|
o(0xdc);
|
||
|
else
|
||
|
o(0xd8);
|
||
|
|
||
|
r = ft & VT_VALMASK;
|
||
|
if (r == VT_CONST) {
|
||
|
o(0x05 + a);
|
||
|
gen_addr32(fc, ft);
|
||
|
} else if (r == VT_LOCAL) {
|
||
|
oad(0x85 + a, fc);
|
||
|
} else {
|
||
|
g(0x00 + a + r);
|
||
|
}
|
||
|
}
|
||
|
vstack_ptr -= 2;
|
||
|
vpop(&vt, &vc);
|
||
|
}
|
||
|
|
||
|
/* convert integers to floating point (float or double) */
|
||
|
void gen_cvtf(int t)
|
||
|
{
|
||
|
if ((vt & (VT_BTYPE | VT_UNSIGNED)) == (VT_INT | VT_UNSIGNED)) {
|
||
|
/* unsigned int to float/double */
|
||
|
o(0x6a); /* push $0 */
|
||
|
g(0x00);
|
||
|
o(0x50 + (vt & VT_VALMASK)); /* push r */
|
||
|
o(0x242cdf); /* fildll (%esp) */
|
||
|
o(0x08c483); /* add $8, %esp */
|
||
|
} else {
|
||
|
/* int to float/double */
|
||
|
o(0x50 + (vt & VT_VALMASK)); /* push r */
|
||
|
o(0x2404db); /* fildl (%esp) */
|
||
|
o(0x04c483); /* add $4, %esp */
|
||
|
}
|
||
|
}
|
||
|
|
||
|
/* end of X86 code generator */
|
||
|
/*************************************************************/
|
||
|
|