tinycc/i386-gen.c

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/*
* X86 code generator for TCC
*
* Copyright (c) 2001 Fabrice Bellard
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
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/* number of available registers */
#define NB_REGS 4
/* a register can belong to several classes */
#define RC_INT 0x0001 /* generic integer register */
#define RC_FLOAT 0x0002 /* generic float register */
#define RC_IRET 0x0004 /* function returned integer register */
#define RC_FRET 0x0008 /* function returned float register */
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/* pretty names for the registers */
enum {
REG_EAX = 0,
REG_ECX,
REG_EDX,
REG_ST0,
};
int reg_classes[NB_REGS] = {
/* eax */ RC_INT | RC_IRET,
/* ecx */ RC_INT,
/* edx */ RC_INT,
/* st0 */ RC_FLOAT | RC_FRET,
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};
/* return registers for function */
#define REG_IRET REG_EAX
#define REG_FRET REG_ST0
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/* defined if function parameters must be evaluated in reverse order */
#define INVERT_FUNC_PARAMS
/* defined if structures are passed as pointers. Otherwise structures
are directly pushed on stack. */
//#define FUNC_STRUCT_PARAM_AS_PTR
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/* pointer size, in bytes */
#define PTR_SIZE 4
/* long double size and alignment, in bytes */
#define LDOUBLE_SIZE 12
#define LDOUBLE_ALIGN 4
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/* function call context */
typedef struct GFuncContext {
int args_size;
} GFuncContext;
/******************************************************/
void g(int c)
{
*(char *)ind++ = c;
}
void o(int c)
{
while (c) {
g(c);
c = c / 256;
}
}
void gen_le32(int c)
{
g(c);
g(c >> 8);
g(c >> 16);
g(c >> 24);
}
/* patch relocation entry with value 'val' */
void greloc_patch1(Reloc *p, int val)
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{
switch(p->type) {
case RELOC_ADDR32:
*(int *)p->addr = val;
break;
case RELOC_REL32:
*(int *)p->addr = val - p->addr - 4;
break;
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}
}
/* output a symbol and patch all calls to it */
void gsym_addr(t, a)
{
int n;
while (t) {
n = *(int *)t; /* next value */
*(int *)t = a - t - 4;
t = n;
}
}
void gsym(t)
{
gsym_addr(t, ind);
}
/* psym is used to put an instruction with a data field which is a
reference to a symbol. It is in fact the same as oad ! */
#define psym oad
/* instruction + 4 bytes data. Return the address of the data */
int oad(int c, int s)
{
o(c);
*(int *)ind = s;
s = ind;
ind = ind + 4;
return s;
}
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/* output constant with relocation if 'r & VT_FORWARD' is true */
void gen_addr32(int r, int c)
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{
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if (!(r & VT_FORWARD)) {
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gen_le32(c);
} else {
greloc((Sym *)c, ind, RELOC_ADDR32);
gen_le32(0);
}
}
/* generate a modrm reference. 'op_reg' contains the addtionnal 3
opcode bits */
void gen_modrm(int op_reg, int r, int c)
{
op_reg = op_reg << 3;
if ((r & VT_VALMASK) == VT_CONST) {
/* constant memory reference */
o(0x05 | op_reg);
gen_addr32(r, c);
} else if ((r & VT_VALMASK) == VT_LOCAL) {
/* currently, we use only ebp as base */
if (c == (char)c) {
/* short reference */
o(0x45 | op_reg);
g(c);
} else {
oad(0x85 | op_reg, c);
}
} else {
g(0x00 | op_reg | (r & VT_VALMASK));
}
}
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/* load 'r' from value 'sv' */
void load(int r, SValue *sv)
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{
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int v, t, ft, fc, fr;
SValue v1;
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fr = sv->r;
ft = sv->t;
fc = sv->c.ul;
v = fr & VT_VALMASK;
if (fr & VT_LVAL) {
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if (v == VT_LLOCAL) {
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v1.t = VT_INT;
v1.r = VT_LOCAL | VT_LVAL;
v1.c.ul = fc;
load(r, &v1);
fr = r;
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}
if ((ft & VT_BTYPE) == VT_FLOAT) {
o(0xd9); /* flds */
r = 0;
} else if ((ft & VT_BTYPE) == VT_DOUBLE) {
o(0xdd); /* fldl */
r = 0;
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} else if ((ft & VT_BTYPE) == VT_LDOUBLE) {
o(0xdb); /* fldt */
r = 5;
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} else if ((ft & VT_TYPE) == VT_BYTE)
o(0xbe0f); /* movsbl */
else if ((ft & VT_TYPE) == (VT_BYTE | VT_UNSIGNED))
o(0xb60f); /* movzbl */
else if ((ft & VT_TYPE) == VT_SHORT)
o(0xbf0f); /* movswl */
else if ((ft & VT_TYPE) == (VT_SHORT | VT_UNSIGNED))
o(0xb70f); /* movzwl */
else
o(0x8b); /* movl */
gen_modrm(r, fr, fc);
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} else {
if (v == VT_CONST) {
o(0xb8 + r); /* mov $xx, r */
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gen_addr32(fr, fc);
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} else if (v == VT_LOCAL) {
o(0x8d); /* lea xxx(%ebp), r */
gen_modrm(r, VT_LOCAL, fc);
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} else if (v == VT_CMP) {
oad(0xb8 + r, 0); /* mov $0, r */
o(0x0f); /* setxx %br */
o(fc);
o(0xc0 + r);
} else if (v == VT_JMP || v == VT_JMPI) {
t = v & 1;
oad(0xb8 + r, t); /* mov $1, r */
oad(0xe9, 5); /* jmp after */
gsym(fc);
oad(0xb8 + r, t ^ 1); /* mov $0, r */
} else if (v != r) {
o(0x89);
o(0xc0 + r + v * 8); /* mov v, r */
}
}
}
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/* store register 'r' in lvalue 'v' */
void store(int r, SValue *v)
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{
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int fr, bt, ft, fc;
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ft = v->t;
fc = v->c.ul;
fr = v->r & VT_VALMASK;
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bt = ft & VT_BTYPE;
/* XXX: incorrect if float reg to reg */
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if (bt == VT_FLOAT) {
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o(0xd9); /* fsts */
r = 2;
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} else if (bt == VT_DOUBLE) {
o(0xdd); /* fstpl */
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r = 2;
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} else if (bt == VT_LDOUBLE) {
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o(0xc0d9); /* fld %st(0) */
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o(0xdb); /* fstpt */
r = 7;
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} else {
if (bt == VT_SHORT)
o(0x66);
if (bt == VT_BYTE)
o(0x88);
else
o(0x89);
}
if (fr == VT_CONST ||
fr == VT_LOCAL ||
(v->r & VT_LVAL)) {
gen_modrm(r, v->r, fc);
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} else if (fr != r) {
o(0xc0 + fr + r * 8); /* mov r, fr */
}
}
/* start function call and return function call context */
void gfunc_start(GFuncContext *c)
{
c->args_size = 0;
}
/* push function parameter which is in (vtop->t, vtop->c). Stack entry
is then popped. */
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void gfunc_param(GFuncContext *c)
{
int size, align, r;
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if ((vtop->t & VT_BTYPE) == VT_STRUCT) {
size = type_size(vtop->t, &align);
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/* align to stack align size */
size = (size + 3) & ~3;
/* allocate the necessary size on stack */
oad(0xec81, size); /* sub $xxx, %esp */
/* generate structure store */
r = get_reg(RC_INT);
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o(0x89); /* mov %esp, r */
o(0xe0 + r);
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vset(VT_INT, r, 0);
vswap();
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vstore();
c->args_size += size;
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} else if (is_float(vtop->t)) {
gv(RC_FLOAT); /* only one float register */
if ((vtop->t & VT_BTYPE) == VT_FLOAT)
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size = 4;
else if ((vtop->t & VT_BTYPE) == VT_DOUBLE)
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size = 8;
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else
size = 12;
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oad(0xec81, size); /* sub $xxx, %esp */
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if (size == 12)
o(0x7cdb);
else
o(0x5cd9 + size - 4); /* fstp[s|l] 0(%esp) */
g(0x24);
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g(0x00);
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c->args_size += size;
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} else {
/* simple type (currently always same size) */
/* XXX: implicit cast ? */
r = gv(RC_INT);
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o(0x50 + r); /* push r */
c->args_size += 4;
}
vtop--;
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}
/* generate function call with address in (vtop->t, vtop->c) and free function
context. Stack entry is popped */
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void gfunc_call(GFuncContext *c)
{
int r;
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if ((vtop->r & (VT_VALMASK | VT_LVAL)) == VT_CONST) {
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/* constant case */
/* forward reference */
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if (vtop->r & VT_FORWARD) {
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greloc(vtop->c.sym, ind + 1, RELOC_REL32);
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oad(0xe8, 0);
} else {
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oad(0xe8, vtop->c.ul - ind - 5);
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}
} else {
/* otherwise, indirect call */
r = gv(RC_INT);
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o(0xff); /* call *r */
o(0xd0 + r);
}
if (c->args_size)
oad(0xc481, c->args_size); /* add $xxx, %esp */
vtop--;
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}
int gjmp(int t)
{
return psym(0xe9, t);
}
/* generate a test. set 'inv' to invert test. Stack entry is popped */
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int gtst(int inv, int t)
{
int v, *p;
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v = vtop->r & VT_VALMASK;
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if (v == VT_CMP) {
/* fast case : can jump directly since flags are set */
g(0x0f);
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t = psym((vtop->c.i - 16) ^ inv, t);
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} else if (v == VT_JMP || v == VT_JMPI) {
/* && or || optimization */
if ((v & 1) == inv) {
/* insert vtop->c jump list in t */
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p = &vtop->c.i;
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while (*p != 0)
p = (int *)*p;
*p = t;
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t = vtop->c.i;
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} else {
t = gjmp(t);
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gsym(vtop->c.i);
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}
} else {
if (is_float(vtop->t)) {
vpushi(0);
gen_op(TOK_NE);
}
if ((vtop->r & (VT_VALMASK | VT_LVAL | VT_FORWARD)) == VT_CONST) {
/* constant jmp optimization */
if ((vtop->c.i != 0) != inv)
t = gjmp(t);
} else {
v = gv(RC_INT);
o(0x85);
o(0xc0 + v * 9);
g(0x0f);
t = psym(0x85 ^ inv, t);
}
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}
vtop--;
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return t;
}
/* generate an integer binary operation */
void gen_opi(int op)
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{
int t, r, fr;
vswap();
r = gv(RC_INT);
vswap();
fr = gv(RC_INT);
vtop--;
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if (op == '+') {
o(0x01);
o(0xc0 + r + fr * 8);
} else if (op == '-') {
o(0x29);
o(0xc0 + r + fr * 8);
} else if (op == '&') {
o(0x21);
o(0xc0 + r + fr * 8);
} else if (op == '^') {
o(0x31);
o(0xc0 + r + fr * 8);
} else if (op == '|') {
o(0x09);
o(0xc0 + r + fr * 8);
} else if (op == '*') {
o(0xaf0f); /* imul fr, r */
o(0xc0 + fr + r * 8);
} else if (op == TOK_SHL | op == TOK_SHR | op == TOK_SAR) {
/* op2 is %ecx */
if (fr != 1) {
if (r == 1) {
r = fr;
fr = 1;
o(0x87); /* xchg r, %ecx */
o(0xc1 + r * 8);
} else
move_reg(1, fr);
}
o(0xd3); /* shl/shr/sar %cl, r */
if (op == TOK_SHL)
o(0xe0 + r);
else if (op == TOK_SHR)
o(0xe8 + r);
else
o(0xf8 + r);
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vtop->r = r;
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} else if (op == '/' | op == TOK_UDIV | op == TOK_PDIV |
op == '%' | op == TOK_UMOD) {
save_reg(2); /* save edx */
t = save_reg_forced(fr); /* save fr and get op2 location */
move_reg(0, r); /* op1 is %eax */
if (op == TOK_UDIV | op == TOK_UMOD) {
o(0xf7d231); /* xor %edx, %edx, div t(%ebp), %eax */
oad(0xb5, t);
} else {
o(0xf799); /* cltd, idiv t(%ebp), %eax */
oad(0xbd, t);
}
if (op == '%' | op == TOK_UMOD)
r = REG_EDX;
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else
r = REG_EAX;
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vtop->r = r;
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} else {
vtop--;
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o(0x39);
o(0xc0 + r + fr * 8); /* cmp fr, r */
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vset(VT_INT, VT_CMP, op);
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}
}
/* generate a floating point operation 'v = t1 op t2' instruction. The
two operands are guaranted to have the same floating point type */
/* NOTE: currently floats can only be lvalues */
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void gen_opf(int op)
{
int a, ft, fc, swapped;
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/* convert constants to memory references */
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if ((vtop[-1].r & (VT_CONST | VT_LVAL)) == VT_CONST) {
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vswap();
gv(RC_FLOAT);
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vswap();
}
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if ((vtop[0].r & (VT_CONST | VT_LVAL)) == VT_CONST)
gv(RC_FLOAT);
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/* must put at least one value in the floating point register */
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if ((vtop[-1].r & VT_LVAL) &&
(vtop[0].r & VT_LVAL)) {
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vswap();
gv(RC_FLOAT);
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vswap();
}
if (op >= TOK_EQ && op <= TOK_GT) {
/* load on stack second operand */
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load(REG_ST0, vtop);
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if (op == TOK_GE || op == TOK_GT)
o(0xc9d9); /* fxch %st(1) */
o(0xe9da); /* fucompp */
o(0xe0df); /* fnstsw %ax */
if (op == TOK_EQ) {
o(0x45e480); /* and $0x45, %ah */
o(0x40fC80); /* cmp $0x40, %ah */
} else if (op == TOK_NE) {
o(0x45e480); /* and $0x45, %ah */
o(0x40f480); /* xor $0x40, %ah */
op = TOK_NE;
} else if (op == TOK_GE || op == TOK_LE) {
o(0x05c4f6); /* test $0x05, %ah */
op = TOK_EQ;
} else {
o(0x45c4f6); /* test $0x45, %ah */
op = TOK_EQ;
}
vtop--;
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vtop->r = VT_CMP;
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vtop->c.i = op;
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} else {
swapped = 0;
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/* swap the stack if needed so that t1 is the register and t2 is
the memory reference */
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if (vtop[-1].r & VT_LVAL) {
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vswap();
swapped = 1;
}
/* no memory reference possible for long double operations */
if ((vtop->t & VT_BTYPE) == VT_LDOUBLE) {
load(REG_ST0, vtop);
swapped = !swapped;
}
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switch(op) {
default:
case '+':
a = 0;
break;
case '-':
a = 4;
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if (swapped)
a++;
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break;
case '*':
a = 1;
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break;
case '/':
a = 6;
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if (swapped)
a++;
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break;
}
ft = vtop->t;
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fc = vtop->c.ul;
if ((ft & VT_BTYPE) == VT_LDOUBLE) {
o(0xde); /* fxxxp %st, %st(1) */
o(0xc1 + (a << 3));
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} else {
if ((ft & VT_BTYPE) == VT_DOUBLE)
o(0xdc);
else
o(0xd8);
gen_modrm(a, vtop->r, fc);
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}
vtop--;
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}
}
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/* convert integers to fp 't' type */
void gen_cvt_itof(int t)
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{
gv(RC_INT);
if ((vtop->t & (VT_BTYPE | VT_UNSIGNED)) == (VT_INT | VT_UNSIGNED)) {
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/* unsigned int to float/double/long double */
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o(0x6a); /* push $0 */
g(0x00);
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o(0x50 + (vtop->r & VT_VALMASK)); /* push r */
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o(0x242cdf); /* fildll (%esp) */
o(0x08c483); /* add $8, %esp */
} else {
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/* int to float/double/long double */
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o(0x50 + (vtop->r & VT_VALMASK)); /* push r */
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o(0x2404db); /* fildl (%esp) */
o(0x04c483); /* add $4, %esp */
}
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vtop->r = REG_ST0;
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}
/* FPU control word for rounding to nearest mode */
/* XXX: should move that into tcc lib support code ! */
static unsigned short __tcc_fpu_control = 0x137f;
/* FPU control word for round to zero mode for int convertion */
static unsigned short __tcc_int_fpu_control = 0x137f | 0x0c00;
/* convert fp to int 't' type */
/* XXX: handle long long case */
void gen_cvt_ftoi(int t)
{
int r, size;
gv(RC_FLOAT);
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if (t == VT_INT | VT_UNSIGNED &&
t == VT_LLONG | VT_UNSIGNED &&
t == VT_LLONG)
size = 8;
else
size = 4;
r = get_reg(RC_INT);
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oad(0x2dd9, (int)&__tcc_int_fpu_control); /* ldcw xxx */
oad(0xec81, size); /* sub $xxx, %esp */
if (size == 4)
o(0x1cdb); /* fistpl */
else
o(0x3cdb); /* fistpll */
o(0x24);
oad(0x2dd9, (int)&__tcc_fpu_control); /* ldcw xxx */
o(0x58 + r); /* pop r */
if (size == 8)
o(0x04c483); /* add $4, %esp */
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vtop->r = r;
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}
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/* convert from one floating point type to another */
void gen_cvt_ftof(int t)
{
/* all we have to do on i386 is to put the float in a register */
gv(RC_FLOAT);
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}
/* pop stack value */
void vpop(void)
{
/* for x86, we need to pop the FP stack */
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if ((vtop->r & VT_VALMASK) == REG_ST0) {
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o(0xd9dd); /* fstp %st(1) */
}
vtop--;
}
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/* end of X86 code generator */
/*************************************************************/