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Add arm64 support to leveldb.

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This commit is contained in:
Chris Mumford 2014-12-11 07:58:00 -08:00
parent cea9b10e5b
commit c4c38f9c1f
1 changed files with 10 additions and 0 deletions
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10
port/atomic_pointer.h
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@ -35,6 +35,8 @@
#define ARCH_CPU_X86_FAMILY 1 #define ARCH_CPU_X86_FAMILY 1
#elif defined(__ARMEL__) #elif defined(__ARMEL__)
#define ARCH_CPU_ARM_FAMILY 1 #define ARCH_CPU_ARM_FAMILY 1
#elif defined(__aarch64__)
#define ARCH_CPU_ARM64_FAMILY 1
#elif defined(__ppc__) || defined(__powerpc__) || defined(__powerpc64__) #elif defined(__ppc__) || defined(__powerpc__) || defined(__powerpc64__)
#define ARCH_CPU_PPC_FAMILY 1 #define ARCH_CPU_PPC_FAMILY 1
#endif #endif
@ -92,6 +94,13 @@ inline void MemoryBarrier() {
} }
#define LEVELDB_HAVE_MEMORY_BARRIER #define LEVELDB_HAVE_MEMORY_BARRIER
// ARM64
#elif defined(ARCH_CPU_ARM64_FAMILY)
inline void MemoryBarrier() {
asm volatile("dmb sy" : : : "memory");
}
#define LEVELDB_HAVE_MEMORY_BARRIER
// PPC // PPC
#elif defined(ARCH_CPU_PPC_FAMILY) && defined(__GNUC__) #elif defined(ARCH_CPU_PPC_FAMILY) && defined(__GNUC__)
inline void MemoryBarrier() { inline void MemoryBarrier() {
@ -215,6 +224,7 @@ class AtomicPointer {
#undef LEVELDB_HAVE_MEMORY_BARRIER #undef LEVELDB_HAVE_MEMORY_BARRIER
#undef ARCH_CPU_X86_FAMILY #undef ARCH_CPU_X86_FAMILY
#undef ARCH_CPU_ARM_FAMILY #undef ARCH_CPU_ARM_FAMILY
#undef ARCH_CPU_ARM64_FAMILY
#undef ARCH_CPU_PPC_FAMILY #undef ARCH_CPU_PPC_FAMILY
} // namespace port } // namespace port