From a7c57939c813699811b0bc27f433ee5aaa98a82e Mon Sep 17 00:00:00 2001 From: Felix Homann Date: Tue, 18 Mar 2014 17:04:40 +0100 Subject: [PATCH] Fix cycleclock.h for gcc/ARM. Currently there are tests for ARMV3 and ARMV6 in cycleclock.h which are not defined using gcc on ARM. Since there is also a cast to the unknown type int64 I assume that the ARM code has not been tested. Therefore this patch replaces the checks for ARMV3 and ARMV6 by checks for __ARM_ARCH. Also, the cast to int64 is fixed by casting to int64_t. --- src/cycleclock.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/cycleclock.h b/src/cycleclock.h index a0c588be..7f9514b6 100644 --- a/src/cycleclock.h +++ b/src/cycleclock.h @@ -95,8 +95,8 @@ inline ATTRIBUTE_ALWAYS_INLINE int64_t Now() { _asm rdtsc #elif defined(COMPILER_MSVC) return __rdtsc(); -#elif defined(ARMV3) -#if defined(ARMV6) // V6 is the earliest arch that has a standard cyclecount +#elif defined(__ARM_ARCH) +#if (__ARM_ARCH >= 6) // V6 is the earliest arch that has a standard cyclecount uint32_t pmccntr; uint32_t pmuseren; uint32_t pmcntenset; @@ -107,7 +107,7 @@ inline ATTRIBUTE_ALWAYS_INLINE int64_t Now() { if (pmcntenset & 0x80000000ul) { // Is it counting? asm("mrc p15, 0, %0, c9, c13, 0" : "=r"(pmccntr)); // The counter is set up to count every 64th cycle - return static_cast(pmccntr) * 64; // Should optimize to << 6 + return static_cast(pmccntr) * 64; // Should optimize to << 6 } } #endif